The PFC flyback SMPS is used in many applications requiring a low cost single stage solution to provide isolated and regulated DC output power with good power factor correction and moderate line current distortion. The control circuit used for the PFC flyback SMPS is one developed for the SMPS boost topology that requires a second stage to provide isolation and output voltage scaling. These controllers are readily available and are low in cost, making them attractive for a low cost PFC flyback SMPS that may be used for consumer and commercial applications, e.g., battery chargers, power supplies for electronics equipment, voltage step-down supplies for lighting applications such as, for example but not limited to, light emitting diode (LED) luminaires, etc.
However, one inherent shortcoming of the flyback topology is that the AC input current waveform tends to be somewhat distorted (flattened) as the sinusoidal voltage waveform peaks rather than the desired sinusoidal waveform. This increases total harmonic distortion (THD) and degrades power factor, e.g., less than 1. The controller circuit uses a sample of the incoming AC voltage sine waveform to program the threshold of the peak switching current envelope in an inductor that is in series with the rectified line. This programmed threshold follows the shape of the rectified line voltage. The boost PFC circuit operates at a frequency much higher than line frequency and produces triangular current waveforms that charge from zero to a peak value programmed by the controller. After the peak reaches the programmed threshold the controller turns off the power switching transistor and current discharges linearly to zero. The peak value of the triangular current waveform is twice the instantaneous value of AC input current, resulting in a sine wave of input current with low harmonic distortion. This works very well for a boost circuit where the average value of the sine is always one half of the peak value of the triangular wave form. However, this is less successful in a PFC flyback SMPS, where the relationship between the average rectified line current and the peak triangular inductor current is not one half and does not remain constant during a half cycle of line current. This error is due to the fact that the inductor discharge current does not flow from the line, but in the magnetizing inductance of the flyback transformer providing energy to the isolated secondary circuit. The waveform seen by the primary circuit is a linear ramp from zero to a peak value follow by a dead period where no current flows in the primary circuit. This dead time varies during the time of the line cycle and is of greater time duration near the peak. This dead time in the PFC flyback SMPS results in a flattened portion of the input current sine wave, resulting in increased THD of the AC input waveform. This problem is more fully described in ST (a registered trademark of STMicroelectronics) application note AN1059 available from STMicroelectronics at www.st.com, incorporated by reference herein for all purposes.